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§ E1M™ open standard · v1.0

One pinout, every module.

The E1M specification fixes the carrier-board pinout, mechanical envelope, and electrical interface of two SoM form factors — so a single base board can host any silicon that conforms. Published under CC BY-SA 4.0. No NDA.

§ Two form factors

Fixed footprints. Silicon-agnostic.

E1M

35 × 35 mm

312 pads · LGA · "Normal"

Compact footprint optimized for always-on MCU-class compute, smart cameras, and ultra-low-power sensors. Hosts the Alif Ensemble and i.MX 93 reference SoMs.

Modules: E1M-AEN · E1M-N93

E1M-X

45 × 65 mm

496 pads · LGA · "Extended"

Higher pad density to expose additional controllers (more PCIe ports, more MIPI CSI lanes, parallel LCD) than fit on E1M. Hosts the Renesas RZ/V2N and RZ/V2H reference SoMs, with optional DeepX M1.

Modules: V2N · V2N+M1 · V2H · V2H+M1

§ Interface count overview

Every peripheral, by form factor.

From §7.2 of the spec — the peripheral count guaranteed by each footprint. Counts are minimum guarantees: a conformant SoM may repurpose digital pads as GPIO beyond the default-function rows below.

Interface E1M E1M-X
Ethernet 1 GbE 2 2
USB 2.0 1 1
USB 3.x 1 2
UART 2 2
SPI 2 3
I²C 2 4
I³C 1 1
I²S 2 2
SDIO / SD card (4-bit) 1 1
CAN-BUS 1 2
JTAG / SWD 1 1
GPIO (default-function) 25 34
PDM microphone 2 2
Audio master clock 1 1
Interface E1M E1M-X
RTC clock output 1 1
Boot-strap pins 4 4
Analogue input (ADC) 8 8
Analogue output (DAC) 2 2
Quadrature encoder 4 4
PWM 8 8
MIPI CSI-2 4-lane 2 4
MIPI DSI 4-lane 2 2
Parallel camera 1 (8-bit) 1 (16-bit)
Parallel LCD (24-bit RGB) 1
PCIe 4-lane 1 2
Reserved (RSVD) 36 22
Not connected (NC) 0 35

§ What it fixes

A contract between the SoM and the carrier board.

Mechanical

Outline, height envelope, component placement areas, soldering guidance, packaging.

Electrical

Power architecture, voltage rails, reset, boot strap, electrical characteristics. Single-supply input.

Pinout

Every pad's default function + GPIO secondary. Compound-function pins and per-SoM tertiary functions.

Boot policy

Mandatory on-module components, normative boot configuration, peripheral-instance naming.

What the spec does not cover: the internal design of any SoM (silicon, on-module components, firmware) — those are vendor-specific and live outside the standard.

§ Versioning

Major bumps stay rare on purpose.

  • Major — bumps for any backwards-incompatible pad change (pad removed, signal-set narrowed, position shifted).
  • Minor — additions only (new alt-function on an existing pad, new pad in a previously reserved location).
  • Releases tagged v<major>.<minor> (e.g. v1.0).

§ Licensing

CC BY-SA 4.0 — share, modify, build.

The specification text and pinout files are licensed under Creative Commons Attribution-ShareAlike 4.0 International. Build a conformant SoM, design a carrier, or fork the spec — just preserve the attribution and license downstream.

The proprietary SoM designs that implement E1M (E1M-AEN, E1M-X V2N, E1M-X V2N+M1, etc.) are not part of the spec and not covered by CC BY-SA 4.0.

§ Repository layout

Everything is in one place.

PathPurpose
STANDARD.mdProse specification. The normative document.
pinout/v1.jsonCanonical machine-readable E1M pinout (Loom v1).
pinout/x-v1.jsonCanonical machine-readable E1M-X pinout (Loom v1).
pinout/schema/loom-v1.schema.jsonJSON Schema validating both pinout files.
images/Pinout drawings, mechanical footprints, placement diagrams.
examples/Reference SoM manifest snippets.
source/altium-*.tsvAuthoritative pin-list exports from Altium.
CHANGELOG.mdVersion history.

§ Build with the spec

Designing a carrier board, or your own E1M SoM?

Grab the pinout JSON, drop the Altium symbol-and-footprint into your project, and you're done. Questions about conformance? We review third-party SoM designs.